[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp SparcRegInfo.h SparcRegInfo.cpp PeepholeOpts.cpp EmitAssembly.cpp
Alkis Evlogimenos
alkis at cs.uiuc.edu
Fri Feb 13 15:02:13 PST 2004
Changes in directory llvm/lib/Target/Sparc:
SparcV9CodeEmitter.cpp updated: 1.55 -> 1.56
SparcRegInfo.h updated: 1.8 -> 1.9
SparcRegInfo.cpp updated: 1.117 -> 1.118
PeepholeOpts.cpp updated: 1.19 -> 1.20
EmitAssembly.cpp updated: 1.105 -> 1.106
---
Log message:
Remove getAllocatedRegNum(). Use getReg() instead.
---
Diffs of the changes: (+8 -9)
Index: llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp
diff -u llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.55 llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.56
--- llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp:1.55 Wed Feb 11 20:27:09 2004
+++ llvm/lib/Target/Sparc/SparcV9CodeEmitter.cpp Fri Feb 13 15:01:20 2004
@@ -661,7 +661,7 @@
// This is necessary because the Sparc backend doesn't actually lay out
// registers in the real fashion -- it skips those that it chooses not to
// allocate, i.e. those that are the FP, SP, etc.
- unsigned fakeReg = MO.getAllocatedRegNum();
+ unsigned fakeReg = MO.getReg();
unsigned realRegByClass = getRealRegNum(fakeReg, MI);
DEBUG(std::cerr << MO << ": Reg[" << std::dec << fakeReg << "] => "
<< realRegByClass << " (LLC: "
Index: llvm/lib/Target/Sparc/SparcRegInfo.h
diff -u llvm/lib/Target/Sparc/SparcRegInfo.h:1.8 llvm/lib/Target/Sparc/SparcRegInfo.h:1.9
--- llvm/lib/Target/Sparc/SparcRegInfo.h:1.8 Thu Jan 15 12:17:07 2004
+++ llvm/lib/Target/Sparc/SparcRegInfo.h Fri Feb 13 15:01:20 2004
@@ -86,7 +86,7 @@
// getZeroRegNum - returns the register that contains always zero this is the
// unified register number
//
- virtual int getZeroRegNum() const;
+ virtual unsigned getZeroRegNum() const;
// getCallAddressReg - returns the reg used for pushing the address when a
// function is called. This can be used for other purposes between calls
Index: llvm/lib/Target/Sparc/SparcRegInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.117 llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.118
--- llvm/lib/Target/Sparc/SparcRegInfo.cpp:1.117 Wed Feb 11 14:47:33 2004
+++ llvm/lib/Target/Sparc/SparcRegInfo.cpp Fri Feb 13 15:01:20 2004
@@ -52,7 +52,7 @@
// getZeroRegNum - returns the register that contains always zero.
// this is the unified register number
//
-int SparcRegInfo::getZeroRegNum() const {
+unsigned SparcRegInfo::getZeroRegNum() const {
return getUnifiedRegNum(SparcRegInfo::IntRegClassID,
SparcIntRegClass::g0);
}
Index: llvm/lib/Target/Sparc/PeepholeOpts.cpp
diff -u llvm/lib/Target/Sparc/PeepholeOpts.cpp:1.19 llvm/lib/Target/Sparc/PeepholeOpts.cpp:1.20
--- llvm/lib/Target/Sparc/PeepholeOpts.cpp:1.19 Wed Feb 11 20:27:09 2004
+++ llvm/lib/Target/Sparc/PeepholeOpts.cpp Fri Feb 13 15:01:20 2004
@@ -63,16 +63,15 @@
static bool IsUselessCopy(const TargetMachine &target, const MachineInstr* MI) {
if (MI->getOpcode() == V9::FMOVS || MI->getOpcode() == V9::FMOVD) {
return (// both operands are allocated to the same register
- MI->getOperand(0).getAllocatedRegNum() ==
- MI->getOperand(1).getAllocatedRegNum());
+ MI->getOperand(0).getReg() == MI->getOperand(1).getReg());
} else if (MI->getOpcode() == V9::ADDr || MI->getOpcode() == V9::ORr ||
MI->getOpcode() == V9::ADDi || MI->getOpcode() == V9::ORi) {
unsigned srcWithDestReg;
for (srcWithDestReg = 0; srcWithDestReg < 2; ++srcWithDestReg)
if (MI->getOperand(srcWithDestReg).hasAllocatedReg() &&
- MI->getOperand(srcWithDestReg).getAllocatedRegNum()
- == MI->getOperand(2).getAllocatedRegNum())
+ MI->getOperand(srcWithDestReg).getReg()
+ == MI->getOperand(2).getReg())
break;
if (srcWithDestReg == 2)
@@ -82,7 +81,7 @@
unsigned otherOp = 1 - srcWithDestReg;
return (// either operand otherOp is register %g0
(MI->getOperand(otherOp).hasAllocatedReg() &&
- MI->getOperand(otherOp).getAllocatedRegNum() ==
+ MI->getOperand(otherOp).getReg() ==
target.getRegInfo().getZeroRegNum()) ||
// or operand otherOp == 0
Index: llvm/lib/Target/Sparc/EmitAssembly.cpp
diff -u llvm/lib/Target/Sparc/EmitAssembly.cpp:1.105 llvm/lib/Target/Sparc/EmitAssembly.cpp:1.106
--- llvm/lib/Target/Sparc/EmitAssembly.cpp:1.105 Wed Feb 11 20:27:09 2004
+++ llvm/lib/Target/Sparc/EmitAssembly.cpp Fri Feb 13 15:01:20 2004
@@ -637,7 +637,7 @@
case MachineOperand::MO_CCRegister:
case MachineOperand::MO_MachineRegister:
{
- int regNum = (int)mop.getAllocatedRegNum();
+ int regNum = (int)mop.getReg();
if (regNum == Target.getRegInfo().getInvalidRegNum()) {
// better to print code with NULL registers than to die
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