[llvm-commits] CVS: llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp

[Anand Shukla]

Changes in directory llvm/lib/Reoptimizer/BinInterface:

sparcbin.cpp updated: 1.6 -> 1.7

---
Log message:

Fixed some bugs with register pressure and spills, and added some more ALU instruction constructors

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Diffs of the changes:

Index: llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp
diff -u llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp:1.6 llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp:1.7
--- llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp:1.6	Sat May 31 21:36:26 2003
+++ llvm/lib/Reoptimizer/BinInterface/sparcbin.cpp	Wed Jun  4 04:40:54 2003
@@ -182,14 +182,14 @@
     // Add instruction into linked list for given section
     insert_instr(tail, instr);
     tail = cid;
-#ifdef FOR_DEBUG
+    //#ifdef FOR_DEBUG
     printf("cid :%u\t", cid);
     if(instr->isFloatingPoint)
       printf("FP\n");
     else
       sparc_print(instr->instr);
     printf("\n");
-#endif    
+    //#endif    
 
     cid++;
     ibegin++;
@@ -595,6 +595,37 @@
   
   return cid;
 }
+
+unsigned BinInterface::newaluOnlyRs2(unsigned op, unsigned rs2){
+  instruction *instr = new instruction();
+  //do not set the flags IF_R_RSx, and instead assign SSA values to 
+  //rs1 and rs2 right here
+  instr->flags = (IF_ALUOP | IF_RS1_RS2_DEFINED | IF_R_RS2);
+  instr-> alu.genrs2 = rs2;
+  
+  instr->instr = op;
+  unsigned cid = itable.size();
+  instr->self = cid;
+  itable.push_back(instr);
+  
+  return cid;
+}
+
+unsigned BinInterface::newaluOnlyRs1(unsigned op, unsigned rs1){
+  instruction *instr = new instruction();
+  //do not set the flags IF_R_RSx, and instead assign SSA values to 
+  //rs1 and rs2 right here
+  instr->flags = (IF_ALUOP | IF_RS1_RS2_DEFINED | IF_R_RS1);
+  instr-> alu.genrs1 = rs1;
+  
+  instr->instr = op;
+  unsigned cid = itable.size();
+  instr->self = cid;
+  itable.push_back(instr);
+  
+  return cid;
+}
+
 
 //Create a NOP
 unsigned BinInterface::newnop(){