[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp

[Misha Brukman]

Changes in directory llvm/lib/Target/Sparc:

SparcInstrInfo.cpp updated: 1.45 -> 1.46

---
Log message:

Convert load/store opcodes from register to immediate forms, if necessary.


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Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.45 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.46
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.45	Sat May 31 02:30:29 2003
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Mon Jun  2 22:20:57 2003
@@ -478,6 +478,7 @@
     // Generate the load instruction
     int64_t zeroOffset = 0;           // to avoid ambiguity with (Value*) 0
     unsigned Opcode = ChooseLoadInstruction(val->getType());
+    Opcode = convertOpcodeFromRegToImm(Opcode);
     mvec.push_back(BuildMI(Opcode, 3).addReg(addrReg).
                    addSImm(zeroOffset).addRegDef(dest));
       
@@ -532,7 +533,9 @@
   }
 
   unsigned FPReg = target.getRegInfo().getFramePointer();
-  mvec.push_back(BuildMI(ChooseStoreInstruction(storeType), 3)
+  unsigned StoreOpcode = ChooseStoreInstruction(storeType);
+  StoreOpcode = convertOpcodeFromRegToImm(StoreOpcode);
+  mvec.push_back(BuildMI(StoreOpcode, 3)
                  .addReg(storeVal).addMReg(FPReg).addSImm(offset));
 
   // Load instruction loads [%fp+offset] to `dest'.
@@ -541,7 +544,9 @@
   // On SparcV9: float for int or smaller, double for long.
   // 
   const Type* loadType = (srcSize <= 4)? Type::FloatTy : Type::DoubleTy;
-  mvec.push_back(BuildMI(ChooseLoadInstruction(loadType), 3)
+  unsigned LoadOpcode = ChooseLoadInstruction(loadType);
+  LoadOpcode = convertOpcodeFromRegToImm(LoadOpcode);
+  mvec.push_back(BuildMI(LoadOpcode, 3)
                  .addMReg(FPReg).addSImm(offset).addRegDef(dest));
 }
 
@@ -577,7 +582,9 @@
   // Store instruction stores `val' to [%fp+offset].
   // The store opCode is based only the source value being copied.
   // 
-  mvec.push_back(BuildMI(ChooseStoreInstruction(opTy), 3)
+  unsigned StoreOpcode = ChooseStoreInstruction(opTy);
+  StoreOpcode = convertOpcodeFromRegToImm(StoreOpcode);  
+  mvec.push_back(BuildMI(StoreOpcode, 3)
                  .addReg(val).addMReg(FPReg).addSImm(offset));
 
   // Load instruction loads [%fp+offset] to `dest'.
@@ -588,7 +595,9 @@
   // ensure correct sign-extension for UByte, UShort or UInt:
   // 
   const Type* loadTy = (opTy == Type::FloatTy)? Type::IntTy : Type::LongTy;
-  mvec.push_back(BuildMI(ChooseLoadInstruction(loadTy), 3).addMReg(FPReg)
+  unsigned LoadOpcode = ChooseLoadInstruction(loadTy);
+  LoadOpcode = convertOpcodeFromRegToImm(LoadOpcode);
+  mvec.push_back(BuildMI(LoadOpcode, 3).addMReg(FPReg)
                  .addSImm(offset).addRegDef(dest));
 }