[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h TargetRegInfo.h TargetSchedInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.41 -> 1.42
TargetRegInfo.h updated: 1.30 -> 1.31
TargetSchedInfo.h updated: 1.13 -> 1.14

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo


---
Diffs of the changes:

Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.41 llvm/include/llvm/Target/TargetInstrInfo.h:1.42
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.41	Sun Jan 12 18:21:19 2003
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Tue Jan 14 15:59:58 2003
@@ -4,8 +4,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_TARGET_MACHINEINSTRINFO_H
-#define LLVM_TARGET_MACHINEINSTRINFO_H
+#ifndef LLVM_TARGET_TARGETINSTRINFO_H
+#define LLVM_TARGET_TARGETINSTRINFO_H
 
 #include "Support/DataTypes.h"
 #include <vector>
@@ -29,14 +29,10 @@
 
 
 //---------------------------------------------------------------------------
-// struct MachineInstrDescriptor:
+// struct TargetInstrDescriptor:
 //	Predefined information about each machine instruction.
 //	Designed to initialized statically.
-// 
-// class MachineInstructionInfo
-//	Interface to description of machine instructions
-// 
-//---------------------------------------------------------------------------
+//
 
 const unsigned M_NOP_FLAG		= 1 << 0;
 const unsigned M_BRANCH_FLAG		= 1 << 1;
@@ -78,8 +74,11 @@
   const unsigned *ImplicitDefs;  // Registers implicitly defined by this instr
 };
 
-typedef TargetInstrDescriptor MachineInstrDescriptor;
 
+//---------------------------------------------------------------------------
+/// 
+/// TargetInstrInfo - Interface to description of machine instructions
+/// 
 class TargetInstrInfo {
   const TargetInstrDescriptor* desc;    // raw array to allow static init'n
   unsigned descSize;                    // number of entries in the desc array
@@ -380,7 +379,5 @@
     abort();
   }
 };
-
-typedef TargetInstrInfo MachineInstrInfo;
 
 #endif


Index: llvm/include/llvm/Target/TargetRegInfo.h
diff -u llvm/include/llvm/Target/TargetRegInfo.h:1.30 llvm/include/llvm/Target/TargetRegInfo.h:1.31
--- llvm/include/llvm/Target/TargetRegInfo.h:1.30	Sat Dec 28 21:12:54 2002
+++ llvm/include/llvm/Target/TargetRegInfo.h	Tue Jan 14 15:59:58 2003
@@ -126,7 +126,7 @@
 
   // The following methods are used to generate "copy" machine instructions
   // for an architecture. Currently they are used in TargetRegClass 
-  // interface. However, they can be moved to MachineInstrInfo interface if
+  // interface. However, they can be moved to TargetInstrInfo interface if
   // necessary.
   //
   // The function regTypeNeedsScratchReg() can be used to check whether a


Index: llvm/include/llvm/Target/TargetSchedInfo.h
diff -u llvm/include/llvm/Target/TargetSchedInfo.h:1.13 llvm/include/llvm/Target/TargetSchedInfo.h:1.14
--- llvm/include/llvm/Target/TargetSchedInfo.h:1.13	Sat Dec 28 21:12:54 2002
+++ llvm/include/llvm/Target/TargetSchedInfo.h	Tue Jan 14 15:59:58 2003
@@ -7,7 +7,7 @@
 #ifndef LLVM_TARGET_TARGETSCHEDINFO_H
 #define LLVM_TARGET_TARGETSCHEDINFO_H
 
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "Support/hash_map"
 #include <string>
 
@@ -211,7 +211,7 @@
 					 unsigned _numIssueDeltas);
   /*dtor*/ virtual ~TargetSchedInfo() {}
   
-  inline const MachineInstrInfo& getInstrInfo() const {
+  inline const TargetInstrInfo& getInstrInfo() const {
     return *mii;
   }
   
@@ -283,7 +283,7 @@
   
 protected:
   unsigned	           numSchedClasses;
-  const MachineInstrInfo*  mii;
+  const TargetInstrInfo*   mii;
   const	InstrClassRUsage*  classRUsages;        // raw array by sclass
   const	InstrRUsageDelta*  usageDeltas;	        // raw array [1:numUsageDeltas]
   const InstrIssueDelta*   issueDeltas;	        // raw array [1:numIssueDeltas]