[llvm-commits] CVS: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp Sparc.cpp SparcInstr.def SparcInstrInfo.cpp SparcInternals.h

[Chris Lattner]

Changes in directory llvm/lib/Target/Sparc:

PrologEpilogCodeInserter.cpp updated: 1.20 -> 1.21
Sparc.cpp updated: 1.59 -> 1.60
SparcInstr.def updated: 1.14 -> 1.15
SparcInstrInfo.cpp updated: 1.33 -> 1.34
SparcInternals.h updated: 1.77 -> 1.78

---
Log message:

Rename MachineInstrInfo -> TargetInstrInfo



---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
diff -u llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.20 llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.21
--- llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp:1.20	Sat Dec 28 14:16:08 2002
+++ llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp	Tue Jan 14 15:59:15 2003
@@ -96,7 +96,7 @@
 void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF)
 {
   const TargetMachine &TM = MF.getTarget();
-  const MachineInstrInfo &MII = TM.getInstrInfo();
+  const TargetInstrInfo &MII = TM.getInstrInfo();
 
   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
     MachineBasicBlock &MBB = *I;


Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.59 llvm/lib/Target/Sparc/Sparc.cpp:1.60
--- llvm/lib/Target/Sparc/Sparc.cpp:1.59	Sat Dec 28 14:17:43 2002
+++ llvm/lib/Target/Sparc/Sparc.cpp	Tue Jan 14 15:59:15 2003
@@ -26,7 +26,7 @@
 
 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
 // Build the MachineInstruction Description Array...
-const MachineInstrDescriptor SparcMachineInstrDesc[] = {
+const TargetInstrDescriptor SparcMachineInstrDesc[] = {
 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
           NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS)             \
   { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE,             \
@@ -124,7 +124,7 @@
 //   Primary interface to machine description for the UltraSPARC.
 //   Primarily just initializes machine-dependent parameters in
 //   class TargetMachine, and creates machine-dependent subclasses
-//   for classes such as MachineInstrInfo. 
+//   for classes such as TargetInstrInfo. 
 // 
 //---------------------------------------------------------------------------
 


Index: llvm/lib/Target/Sparc/SparcInstr.def
diff -u llvm/lib/Target/Sparc/SparcInstr.def:1.14 llvm/lib/Target/Sparc/SparcInstr.def:1.15
--- llvm/lib/Target/Sparc/SparcInstr.def:1.14	Mon Oct 28 15:17:20 2002
+++ llvm/lib/Target/Sparc/SparcInstr.def	Tue Jan 14 15:59:15 2003
@@ -35,7 +35,7 @@
 //                                numDelaySlots (in cycles)
 //					latency (in cycles)
 //					    instr sched class (defined above)
-//						instr class flags (defined in MachineInstrInfo.h)
+//						instr class flags (defined in TargetInstrInfo.h)
 
 
 


Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.33 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.34
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.33	Sat Dec 28 14:18:21 2002
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp	Tue Jan 14 15:59:15 2003
@@ -321,14 +321,14 @@
 //   Information about individual instructions.
 //   Most information is stored in the SparcMachineInstrDesc array above.
 //   Other information is computed on demand, and most such functions
-//   default to member functions in base class MachineInstrInfo. 
+//   default to member functions in base class TargetInstrInfo. 
 //---------------------------------------------------------------------------
 
 /*ctor*/
 UltraSparcInstrInfo::UltraSparcInstrInfo()
-  : MachineInstrInfo(SparcMachineInstrDesc,
-		     /*descSize = */ NUM_TOTAL_OPCODES,
-		     /*numRealOpCodes = */ NUM_REAL_OPCODES)
+  : TargetInstrInfo(SparcMachineInstrDesc,
+                    /*descSize = */ NUM_TOTAL_OPCODES,
+                    /*numRealOpCodes = */ NUM_REAL_OPCODES)
 {
   InitializeMaxConstantsTable();
 }


Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.77 llvm/lib/Target/Sparc/SparcInternals.h:1.78
--- llvm/lib/Target/Sparc/SparcInternals.h:1.77	Sat Dec 28 21:13:02 2002
+++ llvm/lib/Target/Sparc/SparcInternals.h	Tue Jan 14 15:59:15 2003
@@ -41,7 +41,7 @@
 
 //---------------------------------------------------------------------------
 // enum SparcMachineOpCode. 
-// const MachineInstrDescriptor SparcMachineInstrDesc[]
+// const TargetInstrDescriptor SparcMachineInstrDesc[]
 // 
 // Purpose:
 //   Description of UltraSparc machine instructions.
@@ -62,7 +62,7 @@
 
 
 // Array of machine instruction descriptions...
-extern const MachineInstrDescriptor SparcMachineInstrDesc[];
+extern const TargetInstrDescriptor SparcMachineInstrDesc[];
 
 
 //---------------------------------------------------------------------------
@@ -72,10 +72,10 @@
 //   Information about individual instructions.
 //   Most information is stored in the SparcMachineInstrDesc array above.
 //   Other information is computed on demand, and most such functions
-//   default to member functions in base class MachineInstrInfo. 
+//   default to member functions in base class TargetInstrInfo. 
 //---------------------------------------------------------------------------
 
-struct UltraSparcInstrInfo : public MachineInstrInfo {
+struct UltraSparcInstrInfo : public TargetInstrInfo {
   UltraSparcInstrInfo();
 
   //
@@ -733,7 +733,7 @@
 public:
   UltraSparc();
 
-  virtual const MachineInstrInfo &getInstrInfo() const { return instrInfo; }
+  virtual const TargetInstrInfo  &getInstrInfo() const { return instrInfo; }
   virtual const TargetSchedInfo  &getSchedInfo() const { return schedInfo; }
   virtual const TargetRegInfo    &getRegInfo()   const { return regInfo; }
   virtual const TargetFrameInfo  &getFrameInfo() const { return frameInfo; }