[llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h MachineSchedInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

MachineInstrInfo.h updated: 1.24 -> 1.25
MachineSchedInfo.h updated: 1.10 -> 1.11

---
Log message:

Make scheduling class variables be 'unsigned' instead of 'int'


---
Diffs of the changes:

Index: llvm/include/llvm/Target/MachineInstrInfo.h
diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.24 llvm/include/llvm/Target/MachineInstrInfo.h:1.25
--- llvm/include/llvm/Target/MachineInstrInfo.h:1.24	Sun Oct 27 18:26:17 2002
+++ llvm/include/llvm/Target/MachineInstrInfo.h	Sun Oct 27 22:53:18 2002
@@ -13,7 +13,6 @@
 #include "llvm/DerivedTypes.h"
 
 class MachineInstrDescriptor;
-class TmpInstruction;
 class MachineInstr;
 class TargetMachine;
 class Value;
@@ -27,7 +26,7 @@
 
 typedef int MachineOpCode;
 typedef int OpCodeMask;
-typedef int InstrSchedClass;
+typedef unsigned InstrSchedClass;
 
 const MachineOpCode INVALID_MACHINE_OPCODE = -1;
 


Index: llvm/include/llvm/Target/MachineSchedInfo.h
diff -u llvm/include/llvm/Target/MachineSchedInfo.h:1.10 llvm/include/llvm/Target/MachineSchedInfo.h:1.11
--- llvm/include/llvm/Target/MachineSchedInfo.h:1.10	Sun Oct 27 20:11:34 2002
+++ llvm/include/llvm/Target/MachineSchedInfo.h	Sun Oct 27 22:53:18 2002
@@ -196,9 +196,8 @@
     assert(opCode >= 0 && opCode < (int) instrRUsages.size());
     return instrRUsages[opCode];
   }
-  inline const InstrClassRUsage&
-			getClassRUsage(const InstrSchedClass& sc) const {
-    assert(sc >= 0 && sc < numSchedClasses);
+  const InstrClassRUsage& getClassRUsage(const InstrSchedClass& sc) const {
+    assert(sc < numSchedClasses);
     return classRUsages[sc];
   }
   
@@ -225,7 +224,7 @@
   }
   
   inline  unsigned getMaxIssueForClass(const InstrSchedClass& sc) const {
-    assert(sc >= 0 && sc < numSchedClasses);
+    assert(sc < numSchedClasses);
     return classRUsages[sc].maxNumIssue;
   }
 
@@ -283,7 +282,7 @@
   }
   
 protected:
-  int		           numSchedClasses;
+  unsigned	           numSchedClasses;
   const MachineInstrInfo*  mii;
   const	InstrClassRUsage*  classRUsages;        // raw array by sclass
   const	InstrRUsageDelta*  usageDeltas;	        // raw array [1:numUsageDeltas]