[llvm-bugs] [Bug 237718] [AMDGPU] performMulhsCombine has no width check: `mulhs i24` (also i7/i8/i16/i64) becomes MULHI_I24 (bits 32..47), so the `_BitInt(24)` high multiply returns the wrong bits

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Sun Nov 1 04:09:15 PST 2026

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Previous message: [llvm-bugs] [Bug 237713] [AVX-512] Just emit `min(vec, splat(1))`, not `test+masked mov`
Next message: [llvm-bugs] [Bug 237719] [SelectionDAG][LegalizeTypes] Fast-math flags of one user leak onto a shared soft-promoted f16 value: `llvm.maximum(NaN, z)` returns z on RISC-V without Zfh
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