[llvm-bugs] [Bug 156068] [HLSL][DXIL] 16 bit overload of isinf should be emulated in sm6.8 and earlier.

LLVM Bugs via llvm-bugs llvm-bugs at lists.llvm.org
Fri Aug 29 10:28:16 PDT 2025

Previous message: [llvm-bugs] [Bug 156066] Assertion `(BestFactor.Width == LegacyVF.Width || BestPlan.hasEarlyExit() || planContainsAdditionalSimplifications(getPlanFor(BestFactor.Width), CostCtx, OrigLoop, BestFactor.Width) || ....) && " VPlan cost model and legacy cost model disagreed"' failed.
Next message: [llvm-bugs] [Bug 156069] [HLSL] Implement isnormal HLSL function
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20250829/23179be5/attachment.html>

More information about the llvm-bugs mailing list