[llvm-bugs] [Bug 48836] "shufflevector vscale" results in crash (code gen)

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Oct 19 02:17:15 PDT 2021


Peter Waller <peter.waller at arm.com> changed:

           What    |Removed                     |Added
         Resolution|---                         |INVALID
             Status|NEW                         |RESOLVED
                 CC|                            |peter.waller at arm.com

--- Comment #1 from Peter Waller <peter.waller at arm.com> ---
Hi Loris,

Thanks for reporting the issue.

The error message "Running pass 'X86 ..." indicates that that llc is doing
instruction selection for x86. Scalable vectors are only supported with
-mtriple=aarch64 and -mattr=+sve (or equivalent function attributes).

Your reproducer produces correct code when fed into llc -mtriple=aarch64
-mattr=+sve: https://godbolt.org/z/Tb7ajPx3T

I'm marking this as resolved but please reopen the thread if I've missed
something, and please file another bug if you find this kind of error through
another route.


- Peter

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