[llvm-bugs] [Bug 50455] New: SimplifyCFG loses information while processing switch

via llvm-bugs llvm-bugs at lists.llvm.org
Mon May 24 08:10:55 PDT 2021


https://bugs.llvm.org/show_bug.cgi?id=50455

            Bug ID: 50455
           Summary: SimplifyCFG loses information while processing switch
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: degiotheo at gmail.com
                CC: llvm-bugs at lists.llvm.org

Hello.

I am working on an optimization in rustc that is lost by LLVM. When processing
switch statements for which the "otherwise" branch is an unreachable block, the
SimplifyCFG pass loses information on the fact that the input is within a
finite set, preventing further optimizations. Here is an example:

```
define i64 @demo(i64 %x) {
entry:
    switch i64 %x, label %bb3 [
        i64 0, label %bb1
        i64 1, label %bb2
    ]
bb1:
    ret i64 0
bb2:
    %0 = icmp eq i64 %x, 100 ; this will necessarily be false because %x == 1
    br i1 %0, label %bb4, label %bb5
bb3:
    unreachable
bb4:
    ret i64 200
bb5:
    ret i64 10
}
```

when optimized using

```
opt --simplifycfg -S -o repro.out.ll repro.ll
```

is turned into

```
; ModuleID = 'repro.ll'
source_filename = "repro.ll"

define i64 @demo(i64 %x) {
entry:
  %switch = icmp ult i64 %x, 1
  %0 = icmp eq i64 %x, 100
  %. = select i1 %0, i64 200, i64 10
  %merge = select i1 %switch, i64 0, i64 %.
  ret i64 %merge
}
```

which loses the fact that x is either 0 or 1, and thus the useless `icmp` and
`select` will not be eliminated.

Alternatively, is there a good way to ensure the pass does not miss out on
this?

If nobody is available to help us with this, I am eager to work on this myself.
However, I would need a bit of mentoring as I have never contributed to LLVM
before.

Thanks in advance!

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