[llvm-bugs] [Bug 49623] New: [RISCV] Wrong operand order in ISEL pattern for masked vmslt[u]
via llvm-bugs
llvm-bugs at lists.llvm.org
Wed Mar 17 23:25:01 PDT 2021
https://bugs.llvm.org/show_bug.cgi?id=49623
Bug ID: 49623
Summary: [RISCV] Wrong operand order in ISEL pattern for masked
vmslt[u]
Product: libraries
Version: trunk
Hardware: All
OS: All
Status: NEW
Severity: release blocker
Priority: P
Component: Backend: RISC-V
Assignee: unassignedbugs at nondot.org
Reporter: arcbbb at gmail.com
CC: asb at lowrisc.org, llvm-bugs at lists.llvm.org
The input operand order of masked vmslt[u] is (maskedoff, vector_in,
vector_in/scalar_in, mask, vl),
but the isel pattern is (mask, vector_in, vector_in/scalar_in, maskedoff, vl)
This was solved by https://reviews.llvm.org/D98839
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