[llvm-bugs] [Bug 51098] New: WebAssembly doesn't always generate f64x2.convert_low_i32x4_s/u as expected

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=51098

            Bug ID: 51098
           Summary: WebAssembly doesn't always generate
                    f64x2.convert_low_i32x4_s/u as expected
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: srj at google.com
                CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org

Created attachment 25027
  --> https://bugs.llvm.org/attachment.cgi?id=25027&action=edit
Sample .ll file to show the problem

When generating wasm code with simd128 enabled, the LLVM backend only seems to
generate the f64x2.convert_low_i32x4_s (or _u) instructions if the input vector
is *exactly* 4 wide; if the input vector is a multiple of 4 (e.g. 8), the
generated code isn't a sequence of f64x2.convert_low_i32x4_s/u instructions,
but a sequence of scalarized calls to extract_lane+convert_i64_s+replace_lane.

To see this behavior:

```
llc -march=wasm32 test_op_f64x2_convert_low_i32x4_s_0.ll -o - -O3
-mattr=+sign-ext,+simd128,+nontrapping-fptoint
```

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