https://bugs.llvm.org/show_bug.cgi?id=48911
Bug ID: 48911
Summary: InlineSpiller does not use LiveRegMatrix to assign
registers
Product: new-bugs
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: stanislav.mekhanoshin at amd.com
CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org
Created attachment 24428
--> https://bugs.llvm.org/attachment.cgi?id=24428&action=edit
Testcase
InlineSpiller does not have LiveRegMatrix and calls
VirtRegMap::assignVirt2Phys() to assign registers in the
HoistSpillHelper::LRE_DidCloneVirtReg(). That skips calls to the
LiveRegUnion::unify() which is done my LiveRegMatrix ::assign().
The net result of this is inconsistent liveness reported by the LiveRegMatrix
::unassign() if it is called after greedy but before rewriter. See
https://reviews.llvm.org/D95489 for the workaround in the AMDGPU.
Attached testcase which exposes the problem (w/o the patch from D95489):
$ llc < bugpoint-reduced-simplified.ll -march=amdgcn -mcpu=gfx1010 -O3
.text
llc: /home/stas/work/amd-stg/llvm/lib/CodeGen/LiveIntervalUnion.cpp:67: void
llvm::LiveIntervalUnion::extract(llvm::LiveInterval &, const llvm::LiveRange
&): Assertion `SegPos.value() == &VirtReg && "Inconsistent LiveInterval"'
failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash
backtrace.
Stack dump:
0. Program arguments: /home/stas/work/amd-stg/bin/bin/llc -march=amdgcn
-mcpu=gfx1010 -O3
1. Running pass 'CallGraph Pass Manager' on module '<stdin>'.
2. Running pass 'GCN RegBank Reassign' on function '@test'
#0 0x000000000758960c llvm::sys::PrintStackTrace(llvm::raw_ostream&, int)
/home/stas/work/amd-stg/llvm/lib/Support/Unix/Signals.inc:565:11
#1 0x00000000075897db PrintStackTraceSignalHandler(void*)
/home/stas/work/amd-stg/llvm/lib/Support/Unix/Signals.inc:632:1
#2 0x0000000007587cb6 llvm::sys::RunSignalHandlers()
/home/stas/work/amd-stg/llvm/lib/Support/Signals.cpp:70:5
#3 0x0000000007589f77 SignalHandler(int)
/home/stas/work/amd-stg/llvm/lib/Support/Unix/Signals.inc:407:1
#4 0x00007fbde6a5f980 __restore_rt
(/lib/x86_64-linux-gnu/libpthread.so.0+0x12980)
#5 0x00007fbde5508fb7 raise
/build/glibc-S7xCS9/glibc-2.27/signal/../sysdeps/unix/sysv/linux/raise.c:51:0
#6 0x00007fbde550a921 abort /build/glibc-S7xCS9/glibc-2.27/stdlib/abort.c:81:0
#7 0x00007fbde54fa48a __assert_fail_base
/build/glibc-S7xCS9/glibc-2.27/assert/assert.c:89:0
#8 0x00007fbde54fa502 (/lib/x86_64-linux-gnu/libc.so.6+0x30502)
#9 0x0000000006265e0d llvm::LiveIntervalUnion::extract(llvm::LiveInterval&,
llvm::LiveRange const&)
/home/stas/work/amd-stg/llvm/lib/CodeGen/LiveIntervalUnion.cpp:0:5
#10 0x00000000062641bd
llvm::LiveRegMatrix::unassign(llvm::LiveInterval&)::$_1::operator()(unsigned
int, llvm::LiveRange const&) const
/home/stas/work/amd-stg/llvm/lib/CodeGen/LiveRegMatrix.cpp:130:30
#11 0x000000000626321c bool
foreachUnit<llvm::LiveRegMatrix::unassign(llvm::LiveInterval&)::$_1>(llvm::TargetRegisterInfo
const*, llvm::LiveInterval&, llvm::MCRegister,
llvm::LiveRegMatrix::unassign(llvm::LiveInterval&)::$_1)
/home/stas/work/amd-stg/llvm/lib/CodeGen/LiveRegMatrix.cpp:97:11
#12 0x0000000006262f18 llvm::LiveRegMatrix::unassign(llvm::LiveInterval&)
/home/stas/work/amd-stg/llvm/lib/CodeGen/LiveRegMatrix.cpp:127:3
#13 0x000000000496b5a0 (anonymous
namespace)::GCNRegBankReassign::tryReassign((anonymous
namespace)::GCNRegBankReassign::Candidate&)
/home/stas/work/amd-stg/llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp:0:8
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