[llvm-bugs] [Bug 51563] New: incorrect conversion of sqrdmulh+sqsub to sqrdmlsh

via llvm-bugs llvm-bugs at lists.llvm.org
Fri Aug 20 10:57:49 PDT 2021


https://bugs.llvm.org/show_bug.cgi?id=51563

            Bug ID: 51563
           Summary: incorrect conversion of sqrdmulh+sqsub to sqrdmlsh
           Product: clang
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: LLVM Codegen
          Assignee: unassignedclangbugs at nondot.org
          Reporter: jzern at google.com
                CC: llvm-bugs at lists.llvm.org, neeilans at live.com,
                    richard-llvm at metafoo.co.uk, sam.parker at arm.com,
                    sjoerd.meijer at arm.com

Created attachment 25180
  --> https://bugs.llvm.org/attachment.cgi?id=25180&action=edit
repro

The sequence of sqrdmulh followed by sqsub is being converted to sqrdmlsh which
shifts the rounding from the first multiply to the result causing an off by one
in some cases. gcc (tested with aarch64-linux-gnu-gcc (Debian 10.2.1-6+build2)
10.2.1 20210110) does not perform this conversion.

Reproduced with llvmorg-14-init-1836-ge4888be74e34 and releases going back to
3.9.1.

# repros with -O2/-O3, other levels aside from 0 untested.
$ clang -march=armv8.1-a -target aarch64-pc-linux-gnu -O2 \
  sqrdmulh_sqsub-sqrdmlsh-repro.c

See also:
https://godbolt.org/z/zhKnMT15s
https://chromium.googlesource.com/codecs/libgav1/+/65bb0dae17596e88ec33cba5d53d1ce54e2fcfcf

non_opt:                                // @non_opt
        sub     sp, sp, #64                     // =64
        movi    v0.8h, #1, lsl #8
        str     q0, [sp, #48]
        movi    v0.8h, #1
        str     q0, [sp, #32]
        ldr     q0, [sp, #48]
        mov     w8, #42944
        dup     v1.8h, w8
        sqrdmulh        v0.8h, v0.8h, v1.8h
        str     q0, [sp, #16]
        ldr     q0, [sp, #32]
        ldr     q1, [sp, #16]
        sqsub   v0.8h, v0.8h, v1.8h
        str     q0, [sp]
        ldr     q0, [sp]
        add     sp, sp, #64                     // =64
        ret
opt:                                    // @opt
        mov     w8, #42944
        movi    v1.8h, #1, lsl #8
        dup     v2.8h, w8
        movi    v0.8h, #1
        sqrdmlsh        v0.8h, v1.8h, v2.8h
        ret

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