[llvm-bugs] [Bug 50174] New: [MCA][ARM] Assertion failed regarding CarryOver value in the DispatchStage
via llvm-bugs
llvm-bugs at lists.llvm.org
Thu Apr 29 15:53:02 PDT 2021
https://bugs.llvm.org/show_bug.cgi?id=50174
Bug ID: 50174
Summary: [MCA][ARM] Assertion failed regarding CarryOver value
in the DispatchStage
Product: tools
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: llvm-mca
Assignee: unassignedbugs at nondot.org
Reporter: minyihh at uci.edu
CC: andrea.dibiagio at gmail.com, llvm-bugs at lists.llvm.org,
matthew.davis at sony.com
Hi,
When I use the following two instructions as the input:
```
pop {r3, r4, r5, r6, r7, pc}
nop
```
With the following command:
```
$ llvm-mca -mtriple="thumbv7-gnueabihf-linux" -mcpu="cortex-a57" input.s
```
MCA crashes with the following message:
```
llvm-mca: /path/to/llvm-project/llvm/lib/MCA/Stages/DispatchStage.cpp:79:
llvm::Error llvm::mca::DispatchStage::dispatch(llvm::mca::InstRef): Assertion
`!CarryOver && "Cannot dispatch another instruction!"' failed.
```
After digging into it a little bit, I think the problem is that EntryStage
should wait until DispatchStage finish all its carried-over micro-ops (i.e.
until CarryOver == 0) before pumping in another instruction. Originally the
pipeline uses `isAvailable` method in each stage to implement this flow control
/ guard. But `DispatchStage::isAvailable` seems to fail in this case.
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