[llvm-bugs] [Bug 49895] New: optimize smax(x, -1) with bit-hack
via llvm-bugs
llvm-bugs at lists.llvm.org
Thu Apr 8 10:00:10 PDT 2021
https://bugs.llvm.org/show_bug.cgi?id=49895
Bug ID: 49895
Summary: optimize smax(x, -1) with bit-hack
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Common Code Generator Code
Assignee: unassignedbugs at nondot.org
Reporter: spatel+llvm at rotateright.com
CC: llvm-bugs at lists.llvm.org
Noticed while investigating idioms for signum functions...
If we have an smax with -1:
declare i32 @llvm.smax.i32(i32, i32)
define i32 @smax(i32 %x) {
%m = call i32 @llvm.smax.i32(i32 %x, i32 -1)
ret i32 %m
}
or:
define i32 @cmpsel(i32 %x) {
%a = icmp sgt i32 %x, -1
%m = select i1 %a, i32 %x, i32 -1
ret i32 %m
}
It seems most targets would do better to convert to arithmetic shift + logic:
define i32 @tgt(i32 %x) {
%a = ashr i32 %x, 31
%m = or i32 %x, %a
ret i32 %m
}
https://alive2.llvm.org/ce/z/AJYAmp
AArch64:
cmp w0, #0
csinv w0, w0, wzr, ge
vs.
orr w0, w0, w0, asr #31
PowerPC64:
li 4, -1
cmpwi 3, -1
rldic 4, 4, 0, 32
iselgt 3, 3, 4
vs.
srawi 4, 3, 31
or 3, 3, 4
x86:
testl %edi, %edi
movl $-1, %eax
cmovnsl %edi, %eax
vs.
movl %edi, %eax
sarl $31, %eax
orl %edi, %eax
--
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