[llvm-bugs] [Bug 47558] The number of SIMD loads increases unnecessarily

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=47558

Sanjay Patel <spatel+llvm at rotateright.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #6 from Sanjay Patel <spatel+llvm at rotateright.com> ---
Getting the backend to fold the load looks difficult. We don't propagate the
dereferenceable number of bytes into SDAG, so we can't widen the load that
late. 

Ie, vector combine is the right place to get this into ideal form, but we need
to improve the load combining there.

We have the regression test now and TODO comments to track this, so I'll mark
this bug as fixed.

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