[llvm-bugs] [Bug 37872] Instcombine: transform shl(inexact shr(x)) with different constant shifts.

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=37872

Roman Lebedev <lebedev.ri at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
 Fixed By Commit(s)|                            |0ac56e8eaaeb41b59a952fa4658
                   |                            |72f647c930347
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #5 from Roman Lebedev <lebedev.ri at gmail.com> ---
Done in 0ac56e8eaaeb41b59a952fa465872f647c930347.
This doesn't, however, help D46760: we now end up with:

$ ./bin/opt -O3 /tmp/test.ll -o - -S
; ModuleID = '/tmp/test.ll'
source_filename = "/tmp/test.ll"
target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind
declare i32 @get_number() local_unnamed_addr #0

; Function Attrs: nounwind
define void @narrow_long_chain_with_udiv_urem(i64* nocapture %result)
local_unnamed_addr #0 {
  %num1 = tail call i32 @get_number(), !range !0
  %num2 = tail call i32 @get_number(), !range !0
  %1 = shl nuw nsw i32 %num1, 6
  %narrow = add nuw nsw i32 %1, %num2
  %2 = and i32 %narrow, 127
  %tmp2 = zext i32 %2 to i64
  %3 = shl nuw nsw i64 %tmp2, 3
  %tmp4 = and i64 %3, 768
  %tmp5 = or i64 %tmp4, %tmp2
  %tmp6 = or i64 %tmp5, 224
  store i64 %tmp6, i64* %result, align 8
  ret void
}

attributes #0 = { nounwind }

!0 = !{i32 0, i32 9945}

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20201027/f3f35572/attachment.html>