[llvm-bugs] [Bug 47910] New: [RISCV] Handle long conditional branch
via llvm-bugs
llvm-bugs at lists.llvm.org
Mon Oct 19 20:24:43 PDT 2020
https://bugs.llvm.org/show_bug.cgi?id=47910
Bug ID: 47910
Summary: [RISCV] Handle long conditional branch
Product: new-bugs
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: Hsiangkai at gmail.com
CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org
Created attachment 24079
--> https://bugs.llvm.org/attachment.cgi?id=24079&action=edit
Test file for long conditional branch.
For RISC-V conditional branch, the branch targets should be within +-4K off pc.
If the branch target is out of range, one possible solution is to relax it
using other instructions. In current RISC-V implementation, we only issue error
messages for users. It looks like
$ llvm-mc -arch=riscv64 -filetype=obj test.s
test-2.s:4:9: error: fixup value out of range
bne a0, a1, .L1
^
test-2.s:10:9: error: fixup value out of range
beqz a0, .L2
^
We should help users to relax conditional branches if possible.
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