[llvm-bugs] [Bug 47887] New: Missed opportunity for store elimination

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=47887

            Bug ID: 47887
           Summary: Missed opportunity for store elimination
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: david.bolvansky at gmail.com
                CC: llvm-bugs at lists.llvm.org

float r;

void t1( int& x)
{
    ++x;
    r = 0;
    --x;
}


void t2( int& x, float& rr )
{
    ++x;
    rr = 0;
    --x;
}

char c;

void t3( int& x, char& rr )
{
    ++x;
    c = 0;
    --x;
}

void t4( int& x, char& cc )
{
    ++x;
    cc = 0;
    --x;
}




Clang -O3:
t1(int&):                                # @t1(int&)
        mov     eax, dword ptr [rdi]
        mov     dword ptr [rip + r], 0
        mov     dword ptr [rdi], eax
        ret
t2(int&, float&):                              # @t2(int&, float&)
        mov     eax, dword ptr [rdi]
        mov     dword ptr [rsi], 0
        mov     dword ptr [rdi], eax
        ret
t3(int&, char&):                              # @t3(int&, char&)
        mov     eax, dword ptr [rdi]
        mov     byte ptr [rip + c], 0
        mov     dword ptr [rdi], eax
        ret
t4(int&, char&):                              # @t4(int&, char&)
        add     dword ptr [rdi], 1
        mov     byte ptr [rsi], 0
        add     dword ptr [rdi], -1
        ret
r:
        .long   0x00000000                      # float 0

c:
        .byte   0                               # 0x0


ICC -O3:
t1(int&):
        mov       DWORD PTR r[rip], 0                           #7.5
        ret                                                     #9.1
t2(int&, float&):
        mov       DWORD PTR [rsi], 0                            #15.5
        ret                                                     #17.1
t3(int&, char&):
        mov       BYTE PTR c[rip], 0                            #24.5
        ret                                                     #26.1
t4(int&, char&):
        inc       DWORD PTR [rdi]                               #30.7
        mov       BYTE PTR [rsi], 0                             #31.5
        dec       DWORD PTR [rdi]                               #32.7
        ret                                                     #33.1
r:
c:


Godbolt:

https://godbolt.org/z/zh35ch

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