[llvm-bugs] [Bug 47883] New: [aarch64] Redundant masks in downcast long multiply

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https://bugs.llvm.org/show_bug.cgi?id=47883

            Bug ID: 47883
           Summary: [aarch64] Redundant masks in downcast long multiply
           Product: libraries
           Version: 10.0
          Hardware: Other
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AArch64
          Assignee: unassignedbugs at nondot.org
          Reporter: husseydevin at gmail.com
                CC: arnaud.degrandmaison at arm.com,
                    llvm-bugs at lists.llvm.org, smithp352 at googlemail.com,
                    Ties.Stuij at arm.com

All 64-bit backends appear to do this. 

However, I only think this is important on aarch64; x86_64, RISC-V64, MIPS64,
and PPC64 don't appear to have similar instructions that are any more efficient
than the current method, so I am filing this under aarch64.

Code:

  #include <stdint.h>

  uint64_t umull(uint64_t x0, uint64_t x1) {
    // Downcast + upcast works too
    return (x0 & 0xffffffff) * (x1 & 0xffffffff);
  }

  int64_t smull(int64_t x0, int64_t x1) {
    return (int64_t)(int32_t)x0 * (int64_t)(int32_t)x1;
  }


Expected assembly (and what GCC 9.3.0 emits):

umull:
        umull   x0, w0, w1
        ret

smull:
        smull   x0, w0, w1
        ret


Clang 10.0.1:

umull:
        and     x8, x0, #0xffffffff
        and     x9, x1, #0xffffffff
        mul     x0, x8, x9
        ret

smull:
        sxtw    x8, w0
        sxtw    x9, w1
        mul     x0, x8, x9
        ret

Note that if the parameters are 32-bit integers, the expected code is emitted.
However, LLVM always turns this:

  %2 = trunc i64 %0 to i32
  %3 = zext i32 %2 to i64

to this:

 %2 = and i64 %0, 0xffffffff

so this does not work.

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