[llvm-bugs] [Bug 47707] New: [PPC] wrong code generated for cr operations and conditional branch

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=47707

            Bug ID: 47707
           Summary: [PPC] wrong code generated for cr operations and
                    conditional branch
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: PowerPC
          Assignee: unassignedbugs at nondot.org
          Reporter: carrot at google.com
                CC: llvm-bugs at lists.llvm.org, nemanja.i.ibm at gmail.com

Compile following code with 

llc -O2 log3.ll


target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-grtev4-linux-gnu"

define void @foo(i64* %p1, i64 %v1, i8 %v2, i64 %v3) {
  store i64 0, i64* %p1, align 8
  %ext = zext i8 %v2 to i64
  %shift = shl nuw i64 %v1, 8
  %merge = or i64 %shift, %ext
  %not0 = icmp ne i64 %merge, 0
  %bit0 = and i64 %ext, 1                 // and & icmp instructions can be
combined
  %cond1 = icmp eq i64 %bit0, 0           // to and. and generates condition
code to
  br i1 %cond1, label %bb2, label %bb1    // be used by this conditional branch

bb1:
  store i64 %v1, i64* %p1, align 8
  br label %bb2

bb2:
  br i1 %not0, label %exit, label %bb3

bb3:
  store i64 %v3, i64* %p1, align 8
  br label %exit

exit:
  ret void
}

LLVM generates

foo:                                    # @foo
.Lfunc_begin0:
        .cfi_startproc
# %bb.0:
        andi. 7, 5, 1              // and. sets cr0
        rldimi. 5, 4, 8, 0         // rldimi. sets cr0 again
        mcrf 1, 0
        li 5, 0
        std 5, 0(3)
        crnot   20, 6
        bc 4, 1, .LBB0_2           // bc uses cr0 from rldimi., but it should
use cr0 from and.
# %bb.1:                                # %bb1
        std 4, 0(3)
.LBB0_2:                                # %bb2
        bclr 12, 20, 0
# %bb.3:                                # %bb3
        std 6, 0(3)
        blr

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