[llvm-bugs] [Bug 45958] New: [Vplan] Wrong vec.phi generation

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Sun May 17 09:12:16 PDT 2020


https://bugs.llvm.org/show_bug.cgi?id=45958

            Bug ID: 45958
           Summary: [Vplan] Wrong vec.phi generation
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: jaykang10 at gmail.com
                CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org

Created attachment 23497
  --> https://bugs.llvm.org/attachment.cgi?id=23497&action=edit
Example

Let's see simple IR snippet after loop vectorization with VPlanNatviePath.

vector.body:
...
  br label %for.body10.preheader67

for.body10.preheader67:                     ; preds =
%for.cond.cleanup972, %vector.body
  %vec.phi = phi <4 x i64> [ zeroinitializer, %for.cond.cleanup972 ],
[ %8, %vector.body ]
...

for.cond.cleanup972:                              ; preds = %for.body1068
  %8 = add nuw nsw <4 x i64> %vec.phi, <i64 1, i64 1, i64 1, i64 1>
...
  br i1 %10, label %for.cond.cleanup373, label %for.body10.preheader67

As you can see, %vec.phi has wrong incoming basic blocks.

The problem comes from "InnerLoopVectorizer::fixNonInductionPHIs()".
This function has assumption about the order of predecessors as below.

    // The predecessor order is preserved and we can rely on mapping between
    // scalar and vector block predecessors.
    for (unsigned i = 0; i < NumIncomingValues; ++i) {

The original phi's order of predecessors can be different with the new phi's
one.

I have attached the bitcode file. You can reproduce the error with below
command.

opt -enable-vplan-native-path -jump-threading -loop-vectorize  ./input.jt.ll -S
-o -

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