[llvm-bugs] [Bug 45776] New: PowerPC half precision float shenanigans
via llvm-bugs
llvm-bugs at lists.llvm.org
Fri May 1 20:41:00 PDT 2020
https://bugs.llvm.org/show_bug.cgi?id=45776
Bug ID: 45776
Summary: PowerPC half precision float shenanigans
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: PowerPC
Assignee: unassignedbugs at nondot.org
Reporter: nemanja.i.ibm at gmail.com
CC: llvm-bugs at lists.llvm.org, nemanja.i.ibm at gmail.com
I recently fixed PR39865 but in doing so, missed a bunch of other cases that
cause crashes in the PPC back end. Tests borrowed from the X86 back end.
All of the following crash the PPC back end with -mcpu=pwr9:
define i64 @test_fptosi_i64(half* %p) #0 {
%a = load half, half* %p, align 2
%r = fptosi half %a to i64
ret i64 %r
}
define void @test_sitofp_i64(i64 %a, half* %p) #0 {
%r = sitofp i64 %a to half
store half %r, half* %p
ret void
}
define i64 @test_fptoui_i64(half* %p) #0 {
%a = load half, half* %p, align 2
%r = fptoui half %a to i64
ret i64 %r
}
define void @test_uitofp_i64(i64 %a, half* %p) #0 {
%r = uitofp i64 %a to half
store half %r, half* %p
ret void
}
define <4 x float> @test_extend32_vec4(<4 x half>* %p) #0 {
%a = load <4 x half>, <4 x half>* %p, align 8
%b = fpext <4 x half> %a to <4 x float>
ret <4 x float> %b
}
define <4 x double> @test_extend64_vec4(<4 x half>* %p) #0 {
%a = load <4 x half>, <4 x half>* %p, align 8
%b = fpext <4 x half> %a to <4 x double>
ret <4 x double> %b
}
define void @test_trunc32_vec4(<4 x float> %a, <4 x half>* %p) #0 {
%v = fptrunc <4 x float> %a to <4 x half>
store <4 x half> %v, <4 x half>* %p
ret void
}
define void @test_trunc64_vec4(<4 x double> %a, <4 x half>* %p) #0 {
%v = fptrunc <4 x double> %a to <4 x half>
store <4 x half> %v, <4 x half>* %p
ret void
}
And the last two crash the back end with -mcpu=pwr8.
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