[llvm-bugs] [Bug 46403] New: [AMDGPU][MC] Incorrect parsing of operand separators of MTBUF instructions

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=46403

            Bug ID: 46403
           Summary: [AMDGPU][MC] Incorrect parsing of operand separators
                    of MTBUF instructions
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

MTBUF syntax expects that DFMT/NFMT operands are separated by commas, for
example:

    tbuffer_load_format_x v1, off, s[4:7], dfmt:15, s1

However the parser seems to skip next token after DFMT/NFMT without checking
that this is a comma. This bug results in hard to understand syntax errors. For
example, the following code fails to compile with an error "too few operands
for instruction":

    tbuffer_load_format_x v1, off, s[4:7], dfmt:15 s1

The following code is also compiled w/o any issues:

    tbuffer_load_format_x v1, off, s[4:7], dfmt:15 XXXX nfmt:2 YYYY s1

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