[llvm-bugs] [Bug 46152] New: aarch64 "bfm" matching fails with known-zero bits
via llvm-bugs
llvm-bugs at lists.llvm.org
Mon Jun 1 00:36:43 PDT 2020
https://bugs.llvm.org/show_bug.cgi?id=46152
Bug ID: 46152
Summary: aarch64 "bfm" matching fails with known-zero bits
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AArch64
Assignee: unassignedbugs at nondot.org
Reporter: efriedma at quicinc.com
CC: arnaud.degrandmaison at arm.com,
llvm-bugs at lists.llvm.org, smithp352 at googlemail.com,
Ties.Stuij at arm.com
Testcase (https://godbolt.org/z/WSTfEg):
long test(long n, long m) {
return (n & ~15) | ((m&15));
}
long test2(long n, long m) {
return (n & ~15) | (((m<<2)&15));
}
long test3(long n, long m) {
return (n << 4) | ((m&15));
}
long test4(long n, long m) {
return (n << 4) | (((m<<2)&15));
}
test(long, long): // @test(long, long)
bfxil x0, x1, #0, #4
ret
test2(long, long): // @test2(long, long)
lsl w9, w1, #2
and x8, x0, #0xfffffffffffffff0
and x9, x9, #0xc
orr x0, x9, x8
ret
test3(long, long): // @test3(long, long)
bfi x1, x0, #4, #60
mov x0, x1
ret
test4(long, long): // @test4(long, long)
lsl w8, w1, #2
and x8, x8, #0xc
bfi x8, x0, #4, #60
mov x0, x8
ret
Somehow, the matching is getting confused; in test4, we generate an extra
"and"; in test2 we completely fail to generate the bfxil.
Tripped over this looking into a different issue; not sure how important this
is in practice.
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