[llvm-bugs] [Bug 46894] New: Fold smax(shuffle(x, undef, m), shuffle(y, undef, m)) -> shuffle(smax(x, y), undef, m)

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=46894

            Bug ID: 46894
           Summary: Fold smax(shuffle(x,undef,m),shuffle(y,undef,m)) ->
                    shuffle(smax(x,y),undef,m)
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: lebedev.ri at gmail.com, llvm-bugs at lists.llvm.org,
                    spatel+llvm at rotateright.com

For standard binary operators, instcombine optimizes:

define <2 x i64> @swap_mul(<2 x i64> %a0, <2 x i64> %a1) {
  %a = shufflevector <2 x i64> %a0, <2 x i64> %a1, <2 x i32> <i32 1, i32 0>
  %b = shufflevector <2 x i64> %a0, <2 x i64> %a1, <2 x i32> <i32 1, i32 0>
  %r = mul <2 x i64> %a, %b
  ret <2 x i64> %r
}

-->

define <2 x i64> @swap_mul(<2 x i64> %a0, <2 x i64> %a1) {
  %1 = mul <2 x i64> %a0, %a0
  %r = shufflevector <2 x i64> %1, <2 x i64> undef, <2 x i32> <i32 1, i32 0>
  ret <2 x i64> %r
}

But we there's no way to do this for binop style intrinsics
(smax/smin/umax/umin):

define <2 x i64> @swap_smax(<2 x i64> %a0, <2 x i64> %a1) {
  %a = shufflevector <2 x i64> %a0, <2 x i64> %a1, <2 x i32> <i32 1, i32 0>
  %b = shufflevector <2 x i64> %a0, <2 x i64> %a1, <2 x i32> <i32 1, i32 0>
  %r = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b)
  ret <2 x i64> %r
}
declare <2 x i64> @llvm.smax.v2i64(<2 x i64>, <2 x i64>)

As a stretch goal we could do this for triop intrinsics, such as fshl/fshr, as
well:

define <2 x i64> @swap_fshl(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {
  %a = shufflevector <2 x i64> %a0, <2 x i64> %a0, <2 x i32> <i32 1, i32 0>
  %b = shufflevector <2 x i64> %a1, <2 x i64> %a1, <2 x i32> <i32 1, i32 0>
  %c = shufflevector <2 x i64> %a2, <2 x i64> %a2, <2 x i32> <i32 1, i32 0>
  %r = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64>
%c)
  ret <2 x i64> %r
}
declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)

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