[llvm-bugs] [Bug 37890] Equivalent vector shuffles emit widely different x86 avx2 code

via llvm-bugs llvm-bugs at lists.llvm.org
Sun Jul 5 02:19:10 PDT 2020


Simon Pilgrim <llvm-dev at redking.me.uk> changed:

           What    |Removed                     |Added
             Status|NEW                         |RESOLVED
 Fixed By Commit(s)|                            |56a8a5c9fe24
         Resolution|---                         |FIXED

--- Comment #13 from Simon Pilgrim <llvm-dev at redking.me.uk> ---
(In reply to Simon Pilgrim from comment #12)
> The next step on this is probably to add support for EXTRACT_SUBVECTOR
> patterns further up a reduction chain in SelectionDAG::matchBinOpReduction

In conjunction with the add(extract(x),extract(x)) ->
extract(add(x,shuffle(x))) combine in the vector-combiner pass, this was fixed
by https://reviews.llvm.org/rG56a8a5c9fe24

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