[llvm-bugs] [Bug 26844] __builtin_eh_return is not fully implemented for PPC nor PPC64: no DW_CFA_offset output for scratch registers( r3-r6) [still true of 8.0.0]

via llvm-bugs llvm-bugs at lists.llvm.org
Sat Jan 25 18:34:05 PST 2020


Mark Millard <marklmi26-fbsd at yahoo.com> changed:

           What    |Removed                     |Added
             Status|NEW                         |RESOLVED
         Resolution|---                         |INVALID

--- Comment #18 from Mark Millard <marklmi26-fbsd at yahoo.com> ---
FreeBSD head (13) is now llvm/clang 9.0.1 based and looking at
what it produces for powerpc64 shows that:

g++9 has r3-r6 scratch register information in the
with_unwind_init_save_restore and
with_unwind_init_and_eh_return_save_restore example
code, even when based on FreeBSD headers and libraries:

g++9 -std=c++17 -std=c++17 -Wno-psabi -nostdinc -nostdinc++
-I/usr/include/c++/v1 -I/usr/include -nodefaultlibs -lc++ -lcxxrt -lthr -lm -lc
-lgcc_s -o normal_and_special_save_restore.gcc

leads to, for example, normal_and_special_save_restore.gcc

<    5><0x10000c6c:0x10000d04><><cie offset 0x00000114::cie index     0><fde
offset 0x00000110 length: 0x00000030>
       <eh aug data len 0x0>
        0x10000c6c: <off cfa=00(r1) > 
        0x10000c70: <off cfa=112(r1) > 
        0x10000c84: <off cfa=112(r1) > <off r3=-40(cfa) > <off r4=-32(cfa) >
<off r5=-24(cfa) > <off r6=-16(cfa) > <off r31=-8(cfa) > 
        0x10000ca0: <off cfa=112(r31) > <off r2=24(cfa) > <off r3=-40(cfa) >
<off r4=-32(cfa) > <off r5=-24(cfa) > <off r6=-16(cfa) > <off r31=-8(cfa) >
<off r70=-64(cfa) > <off r71=-56(cfa) > <off r7
2=-48(cfa) > 
        0x10000cc0: <off cfa=00(r1) > <off r2=24(cfa) > <off r3=-40(cfa) > <off
r4=-32(cfa) > <off r5=-24(cfa) > <off r6=-16(cfa) > <off r31=-8(cfa) > <off
r70=-64(cfa) > <off r71=-56(cfa) > <off r72=
-48(cfa) > 
. . .

C++ (clang++) does not have any r3, r4, r5, or r6 (scratch
register) information in its dwarf information for the

However, with the use of llvm's libunwind instead of the old
library code in head for powerpc64, the access(es) that expected
to find scratch register descriptions do not happen and there
is no SIGSEGV.

So, if there is some sort of problem here now, such as a clang
vs. gcc ABI mismatch that prevents using one of the compilers,
it is a different problem than was originally being reported
as far as FeeBSD is concerned. (The original technical detail
is still true but the library context changed.)

So a form of "overcome by events". As far as I can tell INVALID
is the best-fit for the status, so that is what I'm selecting.

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