[llvm-bugs] [Bug 44583] New: MOVS with shifted register incorrectly rejected for armv6-m

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=44583

            Bug ID: 44583
           Summary: MOVS with shifted register incorrectly rejected for
                    armv6-m
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: john.brawn at arm.com
                CC: llvm-bugs at lists.llvm.org, peter.smith at linaro.org,
                    Ties.Stuij at arm.com

Doing

   echo "movs r0, r1, lsl #1" | llvm-mc --triple=armv6m-arm-none-eabi
--show-encoding

gets the error

  <stdin>:1:1: error: invalid instruction, any one of the following would fix
this:
  movs r0, r1, lsl #1
  ^
  <stdin>:1:14: note: operand must be an immediate in the range [0,255]
  movs r0, r1, lsl #1
             ^
  <stdin>:1:14: note: operand must be a register in range [r0, r7]
  movs r0, r1, lsl #1
             ^
The armv6-m armarm defines this instruction as an alias of lsls (in section
A6.7.41 MOV shifted register). When assembling for 7-M we do get the correct
encoding:

  echo "movs r0, r1, lsl #1" | llvm-mc --triple=armv7m-arm-none-eabi
--show-encoding

gives

        .text
        lsls    r0, r1, #1              @ encoding: [0x48,0x00]

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