[llvm-bugs] [Bug 47019] New: [ISel TypeLegalizer] Assertion `(isVector()) && "Invalid vector type!" ' failed.

via llvm-bugs llvm-bugs at lists.llvm.org
Thu Aug 6 11:37:29 PDT 2020


https://bugs.llvm.org/show_bug.cgi?id=47019

            Bug ID: 47019
           Summary: [ISel TypeLegalizer] Assertion `(isVector()) &&
                    "Invalid vector type!" ' failed.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: paulsson at linux.vnet.ibm.com
                CC: llvm-bugs at lists.llvm.org

Created attachment 23824
  --> https://bugs.llvm.org/attachment.cgi?id=23824&action=edit
reduced testcase

Reduced test case:

llc -mtriple=s390x-linux-gnu -mcpu=z13 -O3 ./tc_invalid_vec_type.ll

Type legalization begins with:

SelectionDAG has 19 nodes:
  t0: ch = EntryToken
  t19: v8i32 = BUILD_VECTOR Constant:i32<6>, Constant:i32<6>, Constant:i32<6>,
Constant:i32<6>, Constant:i32<6>, Constan\
t:i32<6>, Constant:i32<6>, Constant:i32<6>
  t27: v8i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>,
Constant:i32<0>, Constant:i32<0>, Constan\
t:i32<0>, Constant:i32<0>, Constant:i32<0>
    t9: ch = store<(store 4 into `i32* getelementptr inbounds ([1 x [10 x [8 x
i32]]], [1 x [10 x [8 x i32]]]* @g_317, i\
64 0, i64 0, i64 9, i64 2)`)> t0, Constant:i32<0>, GlobalAddress:i64<[1 x [10 x
[8 x i32]]]* @g_317> + 296, undef:i64
              t23: v8i1 = setcc undef:v8i32, t19, setlt:ch
            t28: v8i32 = vselect t23, t27, t27
          t29: v8i32 = shl t19, t28
        t33: i32 = extract_vector_elt t29, Constant:i32<0>
      t44: i32 = sign_extend_inreg t33, ValueType:ch:i8
    t41: ch = store<(store 4 into `i32* getelementptr inbounds ([9 x i32], [9 x
i32]* @g_150, i64 0, i64 3)`)> t0, t44, \
GlobalAddress:i64<[9 x i32]* @g_150> + 12, undef:i64
  t42: ch = TokenFactor t9, t41

DAGTypeLegalizer::SplitRes_SELECT() is called on t28: v8i32 = vselect t23, t27,
t27. WidenVSELECTAndMask() is called, which calls DAG.getNode(ISD::VSELECT,
...),  which in turn calls simplifySelect(). Since T == F, T is returned, which
is t27. This node has a v8i32 type, and needs to be split. However
Res->getOperand(0) is passed, which is simnply a scalar i32 constant value.
This leads to the triggering of an assert in SplitVector().

It seems that a BUILD_VECTOR should not be split this way.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20200806/04eb650c/attachment.html>


More information about the llvm-bugs mailing list