[llvm-bugs] [Bug 45475] New: [PPC] wrong code generated for ppc_fp128 sign testing

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=45475

            Bug ID: 45475
           Summary: [PPC] wrong code generated for ppc_fp128 sign testing
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: PowerPC
          Assignee: unassignedbugs at nondot.org
          Reporter: carrot at google.com
                CC: llvm-bugs at lists.llvm.org, nemanja.i.ibm at gmail.com

Compile the following code with command line

llc --mtriple=powerpc64le-grtev4-linux-gnu t.ll

define zeroext i1 @ppc128(ppc_fp128 %fp) {
  %v128 = bitcast ppc_fp128 %fp to i128
  %low = trunc i128 %v128 to i64
  %shift = lshr i128 %v128, 64
  %high = trunc i128 %shift to i64
  %c = icmp slt i64 %high, 0           // %c = icmp slt i64 %low, 0
  ret i1 %c
}

LLVM generates:

        li 3, 0
        blr

If I testing the sign of the %low part as in comment, llvm generates the same
code.

In both cases I expect llvm generate bit extraction instructions.

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