[llvm-bugs] [Bug 43447] New: RISC-V instruction selection cannot lower fpext half to float
via llvm-bugs
llvm-bugs at lists.llvm.org
Wed Sep 25 08:32:35 PDT 2019
https://bugs.llvm.org/show_bug.cgi?id=43447
Bug ID: 43447
Summary: RISC-V instruction selection cannot lower fpext half
to float
Product: new-bugs
Version: trunk
Hardware: All
OS: All
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: andrew at ziglang.org
CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org
https://godbolt.org/z/rQo8FS
define void @entry() #0 {
Entry:
%x = alloca half, align 2
%y = alloca float, align 4
store half 0xH4A2C, half* %x, align 2
%0 = load half, half* %x, align 2
%1 = fpext half %0 to float
store float %1, float* %y, align 4
ret void
}
attributes #0= { nobuiltin nounwind }
fatal error: error in backend: Cannot select: 0x559c835b70e0: f32,ch =
load<(dereferenceable load 2 from %ir.x), anyext from f16> 0x559c835b72e8,
FrameIndex:i64<0>, undef:i64
0x559c835b6e08: i64 = FrameIndex<0>
0x559c835b6ed8: i64 = undef
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