[llvm-bugs] [Bug 43227] New: [X86] EltsFromConsecutiveLoads - incorrect folding of non-zero offset base loads
via llvm-bugs
llvm-bugs at lists.llvm.org
Thu Sep 5 05:30:28 PDT 2019
https://bugs.llvm.org/show_bug.cgi?id=43227
Bug ID: 43227
Summary: [X86] EltsFromConsecutiveLoads - incorrect folding of
non-zero offset base loads
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
llvm-dev at redking.me.uk, spatel+llvm at rotateright.com
As reported on D64551, rL366681 doesn't correctly handle cases where the
deerived byte offset of the base load is non-zero.
define void @foo(i32* %explicit_0, <8 x i32>* %explicit_1) {
%1 = getelementptr i32, i32* %explicit_0, i64 63
%2 = bitcast i32* %1 to <3 x i32>*
%3 = load <3 x i32>, <3 x i32>* %2, align 1
%4 = shufflevector <3 x i32> %3, <3 x i32> undef, <2 x i32> <i32 1, i32 2>
%5 = shufflevector <2 x i32> %4, <2 x i32> undef, <8 x i32> <i32 0, i32 1,
i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%6 = shufflevector <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 undef, i32 0,
i32 undef, i32 0>, <8 x i32> %5, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8,
i32 5, i32 9, i32 7>
%7 = getelementptr inbounds <8 x i32>, <8 x i32>* %explicit_1, i64 21
store <8 x i32> %6, <8 x i32>* %7, align 32
ret void
}
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