[llvm-bugs] [Bug 42976] Risc-V clang does not recognize floating point registers in inline asm

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=42976

Luís Marques <luis at luismarques.eu> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |WORKSFORME
             Status|NEW                         |RESOLVED
                 CC|                            |luis at luismarques.eu

--- Comment #1 from Luís Marques <luis at luismarques.eu> ---
This works correctly:

$ cat test.c
void foo() {
    asm ("fadd.s f1, f2, f3");
    asm ("fadd.d fa0, fa1, fa2");
}
$ clang --target=riscv32 -O2 -S test.c -o-
(...)
foo:                                    # @foo
# %bb.0:                                # %entry
        #APP
        fadd.s f1, f2, f3
        #NO_APP
        #APP
        fadd.d fa0, fa1, fa2
        #NO_APP
        ret
(...)

If anything, I wonder if that works more than it should, since we accept that
inline assembly even when not targetting the floating-point extensions.

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