[llvm-bugs] [Bug 41971] New: [X86] Bad codegen for i128 equality comparison

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https://bugs.llvm.org/show_bug.cgi?id=41971

            Bug ID: 41971
           Summary: [X86] Bad codegen for i128 equality comparison
           Product: libraries
           Version: trunk
          Hardware: All
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: nikita.ppv at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, spatel+llvm at rotateright.com

Originally reported at https://github.com/rust-lang/rust/issues/60994.

define i1 @foo(i128 %a, i128 %b) {
  %r = icmp eq i128 %a, %b
  ret i1 %r
}

generates:

        movq    xmm0, rcx
        movq    xmm1, rdx
        punpcklqdq      xmm1, xmm0      # xmm1 = xmm1[0],xmm0[0]
        movq    xmm0, rsi
        movq    xmm2, rdi
        punpcklqdq      xmm2, xmm0      # xmm2 = xmm2[0],xmm0[0]
        pcmpeqb xmm2, xmm1
        pmovmskb        eax, xmm2
        cmp     eax, 65535
        sete    al
        ret

The first DAG combine run goes from

          t2: i64,ch = CopyFromReg t0, Register:i64 %0
          t4: i64,ch = CopyFromReg t0, Register:i64 %1
        t9: i128 = build_pair t2, t4
          t6: i64,ch = CopyFromReg t0, Register:i64 %2
          t8: i64,ch = CopyFromReg t0, Register:i64 %3
        t10: i128 = build_pair t6, t8
      t12: i1 = setcc t9, t10, seteq:ch

to

                t2: i64,ch = CopyFromReg t0, Register:i64 %0
                t4: i64,ch = CopyFromReg t0, Register:i64 %1
              t9: i128 = build_pair t2, t4
            t20: v16i8 = bitcast t9
                t6: i64,ch = CopyFromReg t0, Register:i64 %2
                t8: i64,ch = CopyFromReg t0, Register:i64 %3
              t10: i128 = build_pair t6, t8
            t21: v16i8 = bitcast t10
          t22: v16i8 = setcc t20, t21, seteq:ch
        t23: i32 = X86ISD::MOVMSK t22
      t25: i1 = setcc t23, Constant:i32<65535>, seteq:ch

The offending transform is combineVectorSizedSetCCEquality().

Adding an early bailout if the operands are BUILD_PAIR fixes this specific
issue, but I don't think it really addresses the underlying problem. The
transform as a whole seems rather questionable outside of specific cases such
as the i128s coming from loads.

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