[llvm-bugs] [Bug 42373] New: AARCH64 ADRP/ADD Code Size Regression between v6 and v7

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=42373

            Bug ID: 42373
           Summary: AARCH64 ADRP/ADD Code Size Regression between v6 and
                    v7
           Product: new-bugs
           Version: 7.0
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: rrmills at gmail.com
                CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org

Created attachment 22134
  --> https://bugs.llvm.org/attachment.cgi?id=22134&action=edit
Example of simple code the reproduces issue

In developing for an extremely memory-constrained AARCH64 embedded environment,
I noticed a code size regression between versions 6 and 7.  Specifically, I see
the regression when performing accesses into global structures.  

Earlier versions (6 and older) would compile a single ADRP/ADD to the front of
the global struct at the beginning of a function.  Accesses into the structures
would then be LDR/STR with offsets to the original calculated address.

Later versions are doing ADRP/ADD (followed by STR/LDR) combos on every access
into the struct.  

The issue seems to come up in LLC.  The IR produced by versions 6/7/8 seem
fundamentally identical.  Furthermore, I can feed IR generated by llvm 6 into
LLC for versions 6, 7, and 8, and 7/8 produce the larger code.    In all cases
I am compiling with '-Oz'

I have a bit more info in this thread on the llvm mailing list.  I have also
attached a trivial example in which versions 7 and later will produce larger
code than versions 6 and older.

LLVM Mailing list thread:
http://lists.llvm.org/pipermail/llvm-dev/2019-May/132424.html

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