[llvm-bugs] [Bug 42117] New: Risc-V C compiler assert when casting from a double to an int!

via llvm-bugs llvm-bugs at lists.llvm.org
Mon Jun 3 10:25:01 PDT 2019


https://bugs.llvm.org/show_bug.cgi?id=42117

            Bug ID: 42117
           Summary: Risc-V C compiler assert when casting from a double to
                    an int!
           Product: clang
           Version: 8.0
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: C
          Assignee: unassignedclangbugs at nondot.org
          Reporter: grogers at micron.com
                CC: blitzrakete at gmail.com, dgregor at apple.com,
                    erik.pilkington at gmail.com, llvm-bugs at lists.llvm.org,
                    richard-llvm at metafoo.co.uk

When casting from a double to an int or int to a double the compiler can assert
with the following trace bacK:

fatal error: error in backend: Cannot select: 0x55d6107eec50: f64 = sint_to_fp
      0x55d6107f0da0
  0x55d6107f0da0: i64 = AssertSext 0x55d6107ee498, ValueType:ch:i32
    0x55d6107ee498: i64 = fp_to_sint 0x55d6107eeb80
      0x55d6107eeb80: f64 = fmul 0x55d6107eeab0, 0x55d6107eebe8
        0x55d6107eeab0: f64,ch = load<(dereferenceable load 8 from %ir.6)>
0x55d6107eea48, FrameIndex:i64<3>, undef:i64
          0x55d6107ee9e0: i64 = FrameIndex<3>
          0x55d6107ee500: i64 = undef
        0x55d6107eebe8: f64,ch = load<(load 8 from constant-pool)>
0x55d6107c6da8, 0x55d6107f10e0, undef:i64
          0x55d6107f10e0: i64 = ADDI 0x55d6107f1078,
TargetConstantPool:i64<double 1.024000e+03> 0 [TF=1]
            0x55d6107f1078: i64 = LUI TargetConstantPool:i64<double
1.024000e+03> 0 [TF=2]
              0x55d6107eeb18: i64 = TargetConstantPool<double 1.024000e+03> 0
[TF=2]
            0x55d6107f1010: i64 = TargetConstantPool<double 1.024000e+03> 0
[TF=1]
          0x55d6107ee500: i64 = undef
In function: thread_entry
clang-8: error: clang frontend command failed with exit code 70 (use -v to see
invocation)
clang version 8.0.0 
Target: riscv64-unknown-unknown-elf
Thread model: posix


Here are the command file & source:
mfed03: grogers: bug1 $ cat /tmp/bug-242775.sh
# Crash reproducer for clang version 8.0.0 
# Driver args: "-I" "/nethome/grogers/scratch/emd/emd/simlib/include"
"-march=rv64g" "-c" "bug.r5.c"
# Original command:  "/work/grogers/llvm-project/riscv-build/riscv/bin/clang-8"
"-cc1" "-triple" "riscv64-unknown-unknown-elf" "-emit-obj" "-mrelax-all"
"-disable-free" "-disable-llvm-verifier" "-discard-value-names"
"-main-file-name" "bug.r5.c" "-mrelocation-model" "static" "-mthread-model"
"posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose"
"-mconstructor-aliases" "-nostdsysteminc" "-fuse-init-array" "-target-feature"
"+m" "-target-feature" "+a" "-target-feature" "+f" "-target-feature" "+d"
"-target-abi" "lp64" "-dwarf-column-info" "-debugger-tuning=gdb"
"-coverage-notes-file" "/nethome/grogers/scratch/llvm.bugs/bug1/bug.r5.gcno"
"-resource-dir" "/work/grogers/llvm-project/riscv-build/riscv/lib/clang/8.0.0"
"-I" "/nethome/grogers/scratch/emd/emd/simlib/include" "-isysroot"
"/nethome/grogers/scratch/emd/llvm-riscv-tools/riscv-build/riscv/riscv64-unknown-elf"
"-internal-isystem"
"/nethome/grogers/scratch/emd/llvm-riscv-tools/riscv-build/riscv/riscv64-unknown-elf/include"
"-fdebug-compilation-dir" "/nethome/grogers/scratch/llvm.bugs/bug1"
"-ferror-limit" "19" "-fmessage-length" "80" "-fno-signed-char"
"-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o"
"bug.r5.o" "-x" "c" "bug.r5.c" "-faddrsig"
 "/work/grogers/llvm-project/riscv-build/riscv/bin/clang-8" "-cc1" "-triple"
"riscv64-unknown-unknown-elf" "-emit-obj" "-mrelax-all" "-disable-free"
"-disable-llvm-verifier" "-discard-value-names" "-main-file-name" "bug.r5.c"
"-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim"
"-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-nostdsysteminc"
"-fuse-init-array" "-target-feature" "+m" "-target-feature" "+a"
"-target-feature" "+f" "-target-feature" "+d" "-target-abi" "lp64"
"-dwarf-column-info" "-debugger-tuning=gdb" "-coverage-notes-file"
"/nethome/grogers/scratch/llvm.bugs/bug1/bug.r5.gcno" "-ferror-limit" "19"
"-fmessage-length" "80" "-fno-signed-char" "-fobjc-runtime=gcc"
"-fdiagnostics-show-option" "-fcolor-diagnostics" "-x" "c" "bug-242775.c"
"-faddrsig"
mfed03: grogers: bug1 $ cat /tmp/bug-242775.c
# 1 "<built-in>"
# 1 "bug.r5.c"
/*
 * Copyright (C) 2017 Micron Technology, Inc.
 *
 * This file is the confidential and proprietary property of
 *              Micron Technology, Inc.
 */
//#include <stdint.h>
//#include "emd_htp_runtime.h"

// thread will use clock cycle csr to busy spin for 10 msecs, then return
extern unsigned long htp_get_csr_cycle(void);
void thread_entry(unsigned long u1, unsigned long u2)
{
    //emd_barrier_t *barrier = (emd_barrier_t *)u1;
    double coreClkGhz = *(double *)u2;
    double coreClkNs = 1.0/coreClkGhz;
    // zero least significant bits
    coreClkNs = ((int)(1024.0 * coreClkNs)) / 1024.0;

    // spin for 10 msec
    unsigned long tStart = htp_get_csr_cycle();
    while (1) {
        unsigned long tCurr = htp_get_csr_cycle();
        unsigned long tElapsed = (tCurr - tStart)*((unsigned long)coreClkNs);
        if (tElapsed >= 10000000) break;        // 10 msec
    }
}

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