[llvm-bugs] [Bug 42744] New: [AMDGPU][MC][GFX10] 64-bit shift instructions should only allow 1 scalar value

via llvm-bugs llvm-bugs at lists.llvm.org
Wed Jul 24 10:23:02 PDT 2019


https://bugs.llvm.org/show_bug.cgi?id=42744

            Bug ID: 42744
           Summary: [AMDGPU][MC][GFX10] 64-bit shift instructions should
                    only allow 1 scalar value
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

GFX10 enables 2 scalar values for VOP except for 64-bit shift instructions
which may use only one. Instructions like this:

  v_ashrrev_i64 v[0:1], 0xaf123456, s[0:1] 

should trigger an error.

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