[llvm-bugs] [Bug 42720] New: [InstCombine] Not-of-and or or-of-not's ?

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Jul 23 01:09:13 PDT 2019


https://bugs.llvm.org/show_bug.cgi?id=42720

            Bug ID: 42720
           Summary: [InstCombine] Not-of-and or or-of-not's ?
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: lebedev.ri at gmail.com
                CC: llvm-bugs at lists.llvm.org

https://godbolt.org/z/Ojj1d0

declare { i4, i1 } @llvm.smul.with.overflow.i4(i4, i4) #1

define i1 @t0_umul_sinked(i4 %size, i4 %nmemb) {
  %cmp = icmp eq i4 %size, 0
  %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
  %smul.ov = extractvalue { i4, i1 } %smul, 1
  %phitmp = xor i1 %smul.ov, true
  %or = or i1 %cmp, %phitmp
  ret i1 %or
}

define i1 @t0_umu2222l_hoisted(i4 %size, i4 %nmemb) {
  %cmp = icmp ne i4 %size, 0
  %smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
  %smul.ov = extractvalue { i4, i1 } %smul, 1
  %or = and i1 %cmp, %smul.ov
  %not = xor i1 %or, -1
  ret i1 %not
}

We could transform one into another freely, but we don't.
https://rise4fun.com/Alive/1Uy8

Shall we have a preference here?

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