[llvm-bugs] [Bug 42545] New: [X86_64] Excess movs in XXH64 loop

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https://bugs.llvm.org/show_bug.cgi?id=42545

            Bug ID: 42545
           Summary: [X86_64]  Excess movs in XXH64 loop
           Product: libraries
           Version: trunk
          Hardware: All
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: husseydevin at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, spatel+llvm at rotateright.com

Clang seems to generate extra mov instructions in the XXH64 loop, significantly
hampering performance.

#include <stdint.h>
#include <stddef.h>

static const uint64_t PRIME64_1 = 11400714785074694791ULL;

uint64_t XXH64_mini(const uint64_t* input, size_t len)
{
    const uint64_t *limit = input + len;
    uint64_t v1 = 0;

    do {
        v1 += *input++ * PRIME64_1;
        v1  = (v1 << 31) | (v1 >> (64 - 31)); // rotate
        v1 *= PRIME64_1;
    } while (input<=limit);

    return v1;
}


This is a simplified version of XXH64's loop. 

With -O3, I would expect something like this:

        uint64_t val;
        val  = *input;
        val *= PRIME64_1;
        acc += acc;
        acc  = (acc << 31) | (acc >> (64-31));
        acc *= PRIME64_1;

XXH64_mini:
        movabs  rcx, -7046029288634856825
        lea     rdx, [rdi + 8*rsi]
        xor     eax, eax
.LBB0_1:
        mov     rsi, qword ptr [rdi]
        imul    rsi, rcx
        add     rdi, 8
        add     rax, rsi
        rol     rax, 31
        imul    rax, rcx
        cmp     rdi, rdx
        jbe     .LBB0_1
        ret

However, Clang swaps the add instruction's operands, resulting in an extra mov:

    uint64_t val;
    val  = *input;
    val *= PRIME64_1;
    val += acc;
    val  = (val << 31) | (val >> (64-31));
    acc  = val;
    acc *= PRIME64_1;

XXH64_mini:
        movabs  rcx, -7046029288634856825
        lea     rdx, [rdi + 8*rsi]
        xor     eax, eax
.LBB0_1:
        mov     rsi, qword ptr [rdi]
        imul    rsi, rcx
        add     rdi, 8
        add     rsi, rax   # <<<
        rol     rsi, 31    # <<<
        mov     rax, rsi   # <<<
        imul    rax, rcx
        cmp     rdi, rdx
        jbe     .LBB0_1
        ret

GCC and MSVC both seem to emit the proper code, as seen here:
https://godbolt.org/z/wu7jDY

It appears that all versions of LLVM do this.

I can't seem to figure out how to further simplify this.

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