[llvm-bugs] [Bug 42466] New: [InstCombine] Preferred shift direction in bit test

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https://bugs.llvm.org/show_bug.cgi?id=42466

            Bug ID: 42466
           Summary: [InstCombine] Preferred shift direction in bit test
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: lebedev.ri at gmail.com
                CC: llvm-bugs at lists.llvm.org

As discussed in https://reviews.llvm.org/D63829 

These two patterns are identical:

define i1 @v0(i32 %x, i32 %y, i32 %z) {
  %t0 = lshr i32 %x, %y
  %t2 = and i32 %t0, %z
  %t3 = icmp ne i32 %t2, 0
  ret i1 %t3
}
define i1 @v1(i32 %x, i32 %y, i32 %z) {
  %t0 = shl i32 %y, %y
  %t2 = and i32 %t0, %x
  %t3 = icmp ne i32 %t2, 0
  ret i1 %t3
}

We should canonicalize to one of them.
Probably to @v0.
With one obvious exception of `(1 << y) & x`.

https://godbolt.org/z/KPgPPQ
https://rise4fun.com/Alive/0avd

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