[llvm-bugs] [Bug 40502] New: Failure to merge repeated blend shuffles

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=40502

            Bug ID: 40502
           Summary: Failure to merge repeated blend shuffles
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    spatel+llvm at rotateright.com

https://godbolt.org/z/CDW2iQ

define void @_Z3fooPiS_S_S_(i32*, i32*, i32*, i32*) {
  %5 = bitcast i32* %1 to <4 x i32>*
  %6 = load <4 x i32>, <4 x i32>* %5, align 4
  %7 = bitcast i32* %2 to <4 x i32>*
  %8 = load <4 x i32>, <4 x i32>* %7, align 4
  %9 = mul nsw <4 x i32> %8, %6
  %10 = add nsw <4 x i32> %8, %6
  %11 = shufflevector <4 x i32> %9, <4 x i32> %10, <4 x i32> <i32 0, i32 5, i32
6, i32 3>
  %12 = bitcast i32* %3 to <4 x i32>*
  %13 = load <4 x i32>, <4 x i32>* %12, align 4
  %14 = add nsw <4 x i32> %11, %13
  %15 = sub <4 x i32> %11, %13
  %16 = shufflevector <4 x i32> %14, <4 x i32> %15, <4 x i32> <i32 0, i32 5,
i32 6, i32 3>
  %17 = bitcast i32* %0 to <4 x i32>*
  store <4 x i32> %16, <4 x i32>* %17, align 4
  ret void
}

The output from the vectorizer uses the same shuffle for the 2 partial paths.
We should be able to combine these (in InstCombine/DAGCombine) to:

define void @_Z7foo_vecPiS_S_S_(i32*, i32*, i32*, i32*) {
  %5 = bitcast i32* %1 to <4 x i32>*
  %6 = load <4 x i32>, <4 x i32>* %5, align 1
  %7 = bitcast i32* %2 to <4 x i32>*
  %8 = load <4 x i32>, <4 x i32>* %7, align 1
  %9 = bitcast i32* %3 to <4 x i32>*
  %10 = load <4 x i32>, <4 x i32>* %9, align 1
  %11 = mul <4 x i32> %8, %6
  %12 = add <4 x i32> %11, %10
  %13 = add <4 x i32> %8, %6
  %14 = sub <4 x i32> %13, %10
  %15 = shufflevector <4 x i32> %12, <4 x i32> %14, <4 x i32> <i32 0, i32 5,
i32 6, i32 3>
  %16 = bitcast i32* %0 to <4 x i32>*
  store <4 x i32> %15, <4 x i32>* %16, align 1
  ret void
}

I think selects with the same mask could be done as well?

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