[llvm-bugs] [Bug 30563] [AVX512F] Suboptimal code generated for a _mm_mask_store_sd expansion

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=30563

Simon Pilgrim <llvm-dev at redking.me.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED
 Fixed By Commit(s)|                            |286229, 331958

--- Comment #2 from Simon Pilgrim <llvm-dev at redking.me.uk> ---
Resolving, actual support for these intrinsics was added to the headers at
rL286229, and tweaked at rL331958 to give the optimal codegen requested in the
bug.

The IR we use is:

define @test_mm_mask_store_sd(double*, i8 zeroext, <2 x double>) {
  %4 = bitcast double* %0 to <2 x double>*
  %5 = and i8 %1, 1
  %6 = bitcast i8 %5 to <8 x i1>
  %7 = shufflevector <8 x i1> %6, <8 x i1> undef, <2 x i32> <i32 0, i32 1>
  tail call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %2, <2 x
double>* %4, i32 1, <2 x i1> %7)
  ret void
}
declare void @llvm.masked.store.v2f64.p0v2f64(<2 x double>, <2 x double>*, i32,
<2 x i1>)

@Zvi - please reopen this if you think we have a need to optimise your
alternative IR any further than [Comment #1].

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