[llvm-bugs] [Bug 40442] New: [SelectionDAG] Enable ISD::SADDO/SSUBO/SMULO/UADDO/USUBO/UMULO vector support

via llvm-bugs llvm-bugs at lists.llvm.org
Thu Jan 24 07:07:22 PST 2019


            Bug ID: 40442
           Summary: [SelectionDAG] Enable
                    ISD::SADDO/SSUBO/SMULO/UADDO/USUBO/UMULO vector
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: llvm-bugs at lists.llvm.org, spatel+llvm at rotateright.com
            Blocks: 37763

Now that saturated arithmetic functions support vectors, it'd be useful for the
the related _overflow intrinsics to support vectors as well.

This requires the DAGBuilder, legalization and combines to not just bail/assert
on vector types.

define <8 x i32> @saddo_v8i32(<8 x i32> %a0, <8 x i32> %a1, <8 x i32>* %p2) {
  %t = call {<8 x i32>, <8 x i1>} @llvm.sadd.with.overflow.v8i32(<8 x i32> %a0,
<8 x i32> %a1)
  %val = extractvalue {<8 x i32>, <8 x i1>} %t, 0
  %obit = extractvalue {<8 x i32>, <8 x i1>} %t, 1
  %res = sext <8 x i1> %obit to <8 x i32>
  store <8 x i32> %val, <8 x i32>* %p2
  ret <8 x i32> %res
declare {<8 x i32>, <8 x i1>} @llvm.sadd.with.overflow.v8i32(<8 x i32>, <8 x

Referenced Bugs:

[Bug 37763] [X86] Investigate vectorization of the overflow add/sub nodes to
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