[llvm-bugs] [Bug 40878] New: Failure to reduce indvarsimplify modulo loop output to a simple AND mask
via llvm-bugs
llvm-bugs at lists.llvm.org
Wed Feb 27 01:48:47 PST 2019
https://bugs.llvm.org/show_bug.cgi?id=40878
Bug ID: 40878
Summary: Failure to reduce indvarsimplify modulo loop output to
a simple AND mask
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Loop Optimizer
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: greened at obbligato.org, lebedev.ri at gmail.com,
llvm-bugs at lists.llvm.org, spatel+llvm at rotateright.com
Blocks: 38280
Pulled out of [Bug #38280 Comment #1]:
> On a perhaps related note, the very simple example
> (https://godbolt.org/g/MToVLm):
> unsigned func(unsigned count)
> {
> while (count >= 32)
> count -= 32;
> return count;
> }
>
> Currently produces something like (thanks to indvarsimplify):
>
> define i32 @test(i32 %size) {
> entry:
> %0 = xor i32 %size, -1
> %1 = icmp ugt i32 %0, -32
> %umax = select i1 %1, i32 %0, i32 -32
> %2 = add i32 %umax, %size
> %3 = add i32 %2, 32
> %4 = and i32 %3, -32
> %5 = sub i32 %size, %4
> ret i32 %5
> }
>
> Which is really just:
> https://rise4fun.com/Alive/lKL
>
> define i32 @test(i32 %size) {
> %0 = and i32 %size, 31
> ret i32 %0
> }
Referenced Bugs:
https://bugs.llvm.org/show_bug.cgi?id=38280
[Bug 38280] Pointless loop unroll / vectorization
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