[llvm-bugs] [Bug 41504] New: Use of lsl with w registers should warn/error

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=41504

            Bug ID: 41504
           Summary: Use of lsl with w registers should warn/error
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AArch64
          Assignee: unassignedbugs at nondot.org
          Reporter: srhines at google.com
                CC: arnaud.degrandmaison at arm.com,
                    llvm-bugs at lists.llvm.org, peter.smith at linaro.org,
                    Ties.Stuij at arm.com

https://android-review.googlesource.com/c/platform/art/+/940018 shows a fix
that Android's ART team recently made. From that commit, they previously had
inline assembly that did "add x0, x1, w2, lsl #1", which was invalid and would
be treated as "add x0, x1, x2, uxtx #1" which would keep the high bits. They
had to manually change it to do "uxtw" to ignore the high bits.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20190415/56891020/attachment.html>