[llvm-bugs] [Bug 41358] New: Bad codegen for rotate ops

via llvm-bugs llvm-bugs at lists.llvm.org
Wed Apr 3 04:58:47 PDT 2019


https://bugs.llvm.org/show_bug.cgi?id=41358

            Bug ID: 41358
           Summary: Bad codegen for rotate ops
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AVR
          Assignee: unassignedbugs at nondot.org
          Reporter: hello at dsprenkels.com
                CC: llvm-bugs at lists.llvm.org

I am aware the AVR target is still experimental, so I am a bit unsure wether
this report is actually useful. Anyway, here goes:

I think the codegen for rotate instructions on AVR is incorrect. For example,
the IR

```
define i8 @example(i8, i8) {
  %a = tail call i8 @llvm.fshl.i8(i8 %0, i8 %0, i8 %1)
  ret i8 %a
}

declare i8 @llvm.fshl.i8(i8, i8, i8)
```

compiles to:

```
        .text
        .file   "<stdin>"
        .globl  example                 ; -- Begin function example
        .p2align        1
        .type   example, at function
example:                                ; @example
; %bb.0:
        cpi     r22, 0
        breq    LBB0_2
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
        rol     r24
        subi    r22, 1
        brne    LBB0_1
LBB0_2:
        ret
.Lfunc_end0:
        .size   example, .Lfunc_end0-example
                                        ; -- End function

        ; Declaring this symbol tells the CRT that it should
        ;copy all variables from program memory to RAM on startup
        .globl  __do_copy_data
        ; Declaring this symbol tells the CRT that it should
        ;clear the zeroed data section on startup
        .globl  __do_clear_bss

```

However, the Microchip documentation mentions that on AVR, rotates pass through
the carry bit in the status register. Should the codegen be updated?

For context, avr-gcc also produces a different result:
https://godbolt.org/z/Cs-dif

As a fix, I would propose something like this:

```
        .text
        .file   "<stdin>"
        .globl  example                 ; -- Begin function example
        .p2align        1
        .type   example, at function
example:                                ; @example
; %bb.0:
        cpi     r22, 0
        breq    LBB0_2
        eor     r20                     ; get zero in a register
        clc                             ; clear the carry bit
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
        rol     r24                     ; do a carried rotate to the left
        adc     r24, r20                ; add the carry bit and set the carry
bit to 0
        dec     r22                     ; dec loop counter (without tainting
carry bit)
        brne    LBB0_1
LBB0_2:
        ret
.Lfunc_end0:
        .size   example, .Lfunc_end0-example
                                        ; -- End function

        ; Declaring this symbol tells the CRT that it should
        ;copy all variables from program memory to RAM on startup
        .globl  __do_copy_data
        ; Declaring this symbol tells the CRT that it should
        ;clear the zeroed data section on startup
        .globl  __do_clear_bss

```

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