[llvm-bugs] [Bug 39273] New: wasm32: Lowering of i32x4.lt may not handle sign extension

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https://bugs.llvm.org/show_bug.cgi?id=39273

            Bug ID: 39273
           Summary: wasm32: Lowering of i32x4.lt may not handle sign
                    extension
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: WebAssembly
          Assignee: unassignedbugs at nondot.org
          Reporter: alex at crichton.co
                CC: llvm-bugs at lists.llvm.org, tlively at google.com

It looks like many of the comparison operations for wasm SIMD are all
implemented (nice!) but the tests largely return <4 x i1>. In the bindings
we're thinking of writing we'd like to match the intrinsics themselves in wasm,
which means returning <4 x i32>, and to that end we generate the following IR:


; ModuleID = 'foo.3a1fbbbh-cgu.0'
source_filename = "foo.3a1fbbbh-cgu.0"
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"

; Function Attrs: norecurse nounwind readnone
define <4 x i32> @simd_lt(<4 x i32> %a, <4 x i32> %b) unnamed_addr #0 {
start:
  %0 = icmp eq <4 x i32> %a, %b
  %1 = sext <4 x i1> %0 to <4 x i32>
  ret <4 x i32> %1
}

attributes #0 = { norecurse nounwind readnone "target-features"="+simd128" }



when compiled though this yields:



$ llc foo.ll -filetype=obj
LLVM ERROR: Cannot select: t15: v4i32 = sign_extend_inreg t13,
ValueType:ch:v4i1
  t13: v4i32 = setcc t2, t4, seteq:ch
    t2: v4i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<0>
      t1: i32 = TargetConstant<0>
    t4: v4i32 = WebAssemblyISD::ARGUMENT TargetConstant:i32<1>
      t3: i32 = TargetConstant<1>
In function: simd_lt



This may not be the desired pattern though used to bind these intrinsics! We
certainly don't mind switching to different codegen.

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