[llvm-bugs] [Bug 39272] New: wasm32: Opcodes for some SIMD float operations disagree with current spec

via llvm-bugs llvm-bugs at lists.llvm.org
Fri Oct 12 16:41:36 PDT 2018


https://bugs.llvm.org/show_bug.cgi?id=39272

            Bug ID: 39272
           Summary: wasm32: Opcodes for some SIMD float operations
                    disagree with current spec
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: WebAssembly
          Assignee: unassignedbugs at nondot.org
          Reporter: alex at crichton.co
                CC: llvm-bugs at lists.llvm.org, tlively at google.com

In testing the wasm32 SIMD support of LLVM, I ran across a few opcodes that
looked like they weren't currently matching the spec online. It looks like the
issue is that after the SIMD leading opcode (0xfd) it's expected that the SIMD
operation is encoded as a leb128 integer, but currently LLVM is just emitting
an extra byte.

For example f64x2.abs -
https://github.com/llvm-mirror/llvm/blob/d069d45aa888c5b8a44521d4cade32767c09b35e/test/MC/WebAssembly/simd-encodings.s#L382-L383
- is encoded as 0xfd,0x80, but I think that should be 0xfd,0x80,0x01 with
leb128 encoding.

I haven't currently got a super minimal test case for this, but I can
definitely make one if necessary!

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